Microprocessor.

Microprocessor.

The example presented here demonstrates how these parts work together to perform a simple addition of 2 +2.

prefetch unit paging segment decode bus interface control registers arithmetic logic protection test execution standard RAM SIMM chips.

1 - The prefetch unit (Prefetch Unit), which organizes the rows of instructions for processing requests that the Unit
Bus Interface (Bus Interface Unit) fetch the next instruction in memory - in our example, a command to
add two numbers. The goal of the prefetch unit is not to let the unit Decode (Decode Unit) Instruction
be idle waiting for the next instruction.

2 - At the same time, the units Segmentation and Paging (Paging Segment Unit and Unit) converts the position of that statement
a virtual address, understood by the program, to a physical address (real position in memory), the unit
Bus interface definitions.

3 - The Bus Interface Unit, which connects the chip to the rest of the PC 386, the RAM gets instructions and passes them to the
Prefetch unit.

4 - The prefetch unit forwards this instruction to the Decode Unit, which examines the code, identifies the
as an instruction requesting the sum of two numbers are, converts the instruction into a format that can be understood by
Execution unit (Execution Unit) and forwards it to the Enforcement Unit.

5 - Inside the Implementation Unit, a sub-unit called Control Unit (Control Unit) coordinates the steps necessary
to complete each statement. She tells the other parts of the Enforcement Unit to do and when to do it. For this
operation, the control unit sends a virtual address of the first number to be added, which is stored in RAM, for
Unit Testing Protection (Protection Test Unit).

6 - The Test Unit Protection, which acts as a traffic cop for the Implementation Unit, make sure that the
operations performed by the Execution Unit are legitimate - ie, they do not modify memory locations or
accessing peripherals which it has access. In this case, the unit test verifies that the Protection Control Unit
can access the address of the first number and send it to the Segmentation and Paging Units, where the virtual address is
translated to a physical address to be used by the Bus Interface Unit.

7 - The Bus Interface Unit is located and takes the number stored at that address. The number back through the
Test Unit for the Protection Enforcement Unit, which is stored in one of the internal registers of the chip.
The registers serve as a combination of temporary storage area (scratch pad) and working memory for
the Enforcement Unit. The second number is obtained with a similar operation and is also taken to the Execution Unit.

8 - Arithmetic and Logic Unit (Arithmetic Logic Unit) which is the calculator of the microprocessor, produces the sum of
number just look at the RAM and the first number that was stored in the internal registers.

9 - Control Unit asks the Bus Interface Unit to store the sum in RAM. Units Segmentation
Pagination and translate the virtual address specified by the Control Unit for that sum into a physical address,
completing the instruction.

Note - There are several types of microprocessors 80386. Most of them are distinguished by the speed of work, usually
expressed in megahertz. The higher the number of megahertz, the faster the processor. There are also versions
The DX and SX 386. The DX communicates directly with the RAM in 32-bit. The SX manages the data internally in 32 bits at a time,
as does the DX chip, but communicates with the RAM only 16 bits at a time. A unique advantage of the SX is to be easier and
cheap PCs to be built with older projects.
After the release of 386, Intel created the 80486 chip that also manages 32 bits of data at a time, but has two
components missing in 80386. One is the cache of 8KB RAM built in, which works the same way as a cache
External RAM, to ensure that the processor will not be forced to wait for the data it needs to work. 0 other
component is a math coprocessor built. 0 coprocessor is a set of instructions to perform
complex mathematical operations.

Source: Evolution of Computers